AD7524 characteristics: The AD7524 is a CMOS, 8-bit multiplying digital-to-analog converter widely available from multiple vendors. It implements its conversion core using a(n) ________.

Introduction / Context:
Many integrated DACs use either binary-weighted resistors or an R/2R ladder to realize precise digital-to-analog conversion. The AD7524 family is a classic example of an 8-bit multiplying DAC using R/2R topology for compactness and matching.

Given Data / Assumptions:

• CMOS 8-bit multiplying DAC.
• No internal sample-and-hold; the device outputs a current proportional to the reference.
• Architecture based on precision resistor network.

Concept / Approach:
The R/2R ladder network provides equal-valued switching currents with only two resistor values, easing matching and scaling and improving accuracy across bits compared to discrete binary weighting. The DAC output current is subsequently converted to a voltage with an external op-amp if needed.

Step-by-Step Solution:
1) Decode input bits to control ladder switches.2) Route currents through the R/2R network to form a binary-weighted sum.3) Present the resulting current at the DAC output node.4) Convert to voltage using an I-to-V stage if required.

Verification / Alternative check:
Vendor datasheets for AD7524 explicitly describe the R/2R architecture and multiplying capability (output scales with reference).

Why Other Options Are Wrong:
Sample-and-hold is an ADC accessory. A standalone multiplexer is not a DAC core. A “10 µs clock” is not an architecture and the device does not require a fixed clock.

Common Pitfalls:
Assuming all DACs include S/H; confusing R/2R with simple resistor ladders used for audio volume controls.

Final Answer:
R/2R ladder network