Within a typical microprocessor system, which system bus is inherently bidirectional because it must both carry data to the CPU and carry results or read data away from the CPU?

Introduction / Context:
Buses are shared signal pathways that connect the CPU to memory and peripherals. Directionality distinguishes how information flows. Recognizing which bus must support two-way transfer helps with interfacing and timing analysis.

Given Data / Assumptions:

• Three primary buses: address, data, and control.
• The CPU both reads and writes data.
• Address selection is driven by the CPU outward.

Concept / Approach:
The address bus is unidirectional from CPU to memory/I/O because only the CPU selects the target location. The data bus must be bidirectional so that data can flow into the CPU during reads and out from the CPU during writes. The control bus carries timing and control lines and is not a data-carrying bidirectional bus in the same sense.

Step-by-Step Solution:
Identify read cycle: external device drives data toward the CPU.Identify write cycle: CPU drives data toward the device.Therefore, the data bus must support both directions (bidirectional).Confirm that the address bus only carries addresses from the CPU to devices.

Verification / Alternative check:
Timing diagrams show that on reads, data bus lines are inputs to the CPU; on writes, they become outputs. Tri-state drivers and bus turn-around timing maintain safe direction changes.

Why Other Options Are Wrong:
Control bus: carries strobes and status signals; not bidirectional data lines.

Address bus: unidirectional from CPU to target.

Multiplexed bus: a technique to share lines over time; it does not define directionality by itself.

Status bus: not the primary bidirectional data path.

Common Pitfalls:
Assuming multiplexing implies bidirectionality. Multiplexed address/data buses still separate roles by phase and use direction control logic.

Final Answer:
data bus