8085 addressing width and storage: an 8085 address is 16 bits—does it require two consecutive 8-bit memory locations to store such an address, or “two locations of 16 bits each” as sometimes misstated?

Introduction / Context:
The Intel 8085 has a 16-bit address space (0000H–FFFFH). Memory is byte addressed, and every memory location stores exactly 8 bits. This question clarifies how a 16-bit address value itself is stored in memory.

Given Data / Assumptions:

• 8085 address space width: 16 bits.
• Memory is byte-addressable: one address → one byte (8 bits).
• Endianness conventions may apply (low byte, high byte order) depending on instruction.

Concept / Approach:
A 16-bit quantity occupies two bytes. Therefore, to store an address value (e.g., the contents of the program counter or a pointer), two consecutive memory locations are used—each holding 8 bits. Any wording that says “two memory locations (16 bits each)” is incorrect because standard memory locations are 8 bits on 8085-class systems.

Step-by-Step Solution:

Verification / Alternative check:
Instruction encodings for CALL/JMP and stack PUSH/POP on 8085 show low-byte/high-byte storage across two consecutive bytes.

Why Other Options Are Wrong:
“Two 16-bit locations” do not exist on byte-addressable 8085 memory. “Three bytes due to parity” is irrelevant. “Only the stack” is false; any memory can store addresses.

Common Pitfalls:
Confusing word-sized storage with location size; overlooking endianness when reading/writing multi-byte quantities.

Final Answer:
Applies (two 8-bit locations store a 16-bit address)