Instruction timing terminology: a machine cycle vs. an instruction cycle—does a single “machine cycle” mean the time to fetch and execute a complete instruction?

Introduction / Context:
Precise timing vocabulary matters in microprocessor design. Two terms are often mixed up: machine cycle (sometimes called bus cycle or memory cycle) and instruction cycle (fetch + execute sequence). This question tests whether you can distinguish them correctly.

Given Data / Assumptions:

• An instruction may require several bus operations: opcode fetch, operand read/write, stack access, etc.
• Each bus operation consumes one or more clock periods and is termed a machine cycle.
• The total time to complete an instruction is the instruction cycle, which can span multiple machine cycles.

Concept / Approach:
Machine cycle: the smallest external bus transaction window during which the CPU places an address, asserts control signals (RD, WR, etc.), and transfers a data byte/word. Instruction cycle: the aggregate of all machine cycles required to fetch, decode, and execute one instruction. Therefore, it is incorrect to define a machine cycle as “the time to fetch and execute a complete instruction.”

Step-by-Step Solution:

Verification / Alternative check:
Timing diagrams and datasheets list distinct opcode-fetch and memory-access cycles for many instructions; the total count varies by instruction, confirming the distinction.

Why Other Options Are Wrong:
Applies: confuses the hierarchy of timing terms. Adding “single-byte opcode” or “microcoded CPU” does not change the core definitions.

Common Pitfalls:
Equating the simplest instruction’s total time to a universal “machine cycle” definition; ignoring that multi-byte or multi-step instructions need several cycles.

Final Answer:
Does not apply