ADC performance terms – the time required to complete one full analog-to-digital conversion cycle (from start to valid digital result) is called ________.

Introduction / Context:
Manufacturers specify timing parameters to characterize how fast an ADC can deliver results. Understanding the correct terminology prevents misinterpretation of datasheets and helps in budgeting sample rates and latencies in system design.

Given Data / Assumptions:

• We consider the interval from initiating a conversion to the time the digital output is valid.
• Architecture may be SAR, sigma–delta, or pipeline; term meaning remains consistent.
• Other timing terms exist but refer to different phenomena.

Concept / Approach:
The industry-standard term for the duration needed to finish a single conversion is “conversion time.” It encompasses the algorithmic or settling actions required inside the ADC. By contrast, “aperture jitter” is the uncertainty of the sampling instant; “pipeline latency” is the fixed number of clock cycles between sampling and output in pipeline/sigma–delta ADCs; “settling tolerance” and “monotonic interval” are not names for the full cycle time.

Step-by-Step Solution:

Verification / Alternative check:
ADC datasheets list “tCONV” or similar symbols explicitly for conversion time; other parameters appear in separate timing sections.

Why Other Options Are Wrong:
Aperture jitter is a sampling timing noise; pipeline latency is a fixed delay not equal to the algorithm duration of single-shot devices; the other terms are not standard conversion-cycle names.

Common Pitfalls:
Confusing high sample rate (1 / sample period) with conversion time when pipelines introduce additional latency.

Final Answer:
conversion time