Difficulty: Easy
Correct Answer: More than 6 μs
Explanation:
Introduction / Context:Turn-on of an SCR involves charge spreading and current build-up. External circuit inductance limits di/dt, stretching the apparent electrical turn-on interval. Recognizing this helps in snubber and gate design.
Given Data / Assumptions:
Concept / Approach:Inductance resists rapid current change: v_L = L * di/dt. For a given applied voltage, higher L forces smaller di/dt, delaying attainment of the conduction level at which the device is considered fully on. Hence the effective turn-on time appears longer than the intrinsic value measured under low-inductance test conditions.
Step-by-Step Solution:
Assume same gate pulse; compare di/dt with and without L.With L present, di/dt decreases → longer time to reach rated conduction → apparent t_on increases.Therefore the practical turn-on time is > 6 μs.Verification / Alternative check:
Manufacturers specify di/dt limits; series inductance or saturable reactors are sometimes added purposely to limit di/dt, which inherently increases turn-on interval.Why Other Options Are Wrong:
Equal or less than 6 μs ignores the effect of L on current build-up; zero is impossible.Common Pitfalls:
Confusing intrinsic charge-spread time with circuit-limited current rise; neglecting v = L di/dt.Final Answer:
More than 6 μs
Discussion & Comments