I/O addressing models What is the technique called in which each I/O device is assigned one or more addresses within the memory address space, allowing reads/writes to I/O to use the same instructions used for memory?

Introduction / Context:
Processors interact with peripherals using either a separate I/O space (isolated I/O) or by placing device registers into the regular memory map (memory-mapped I/O). Understanding the naming clarifies how software accesses devices.

Given Data / Assumptions:

• The CPU can perform loads/stores to addresses.
• Peripherals expose control/status/data registers as addressable locations.
• Using the same instruction set for memory and I/O simplifies compilers and code.

Concept / Approach:
Memory-mapped I/O assigns devices to unique addresses in the system memory map. Software uses standard load/store instructions to interact, and the bus fabric routes those transactions to the appropriate device instead of RAM. This contrasts with isolated/ported I/O (for example, x86 IN/OUT instructions) that uses a distinct I/O space.

Step-by-Step Solution:

Verification / Alternative check:
Most microcontrollers (ARM Cortex-M, RISC-V MCUs) use memory-mapped I/O for peripheral registers documented in datasheets.

Why Other Options Are Wrong:

• Ported I/O/dedicated/wired I/O: Nonstandard or ambiguous labels for the described technique.

Common Pitfalls:
Forgetting to mark device regions as noncacheable; treating I/O like RAM can cause stale reads unless memory attributes are set correctly.

Final Answer:
memory-mapped I/O