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Programmable Logic Device problems
1. A circuit that implements a combinational logic function by storing a list of output values that correspond to all possible input combinations is a(n) ________.
Options
A. output logic macrocell
B. look-up table
C. parallel logic expander
D. logic element
Show Answer
Scratch Pad
Discuss
Correct Answer: look-up table
2. The output of this circuit is always ________.
Options
A. 1
B. 0
C. A
D.
A
Show Answer
Scratch Pad
Discuss
Correct Answer:
A
3. Which of the following is true?
Options
A. Altera uses PAL architecture and Xilinx uses PLA architecture.
B. Altera uses PLA architecture and Xilinx uses PAL architecture.
C. Altera and Xilinx both use PAL architecture.
D. Altera and Xilinx both use PLA architecture.
Show Answer
Scratch Pad
Discuss
Correct Answer: Altera uses PAL architecture and Xilinx uses PLA architecture.
4. A GAL is essentially a ________.
Options
A. non-reprogrammable PAL
B. PAL that is programmed only by the manufacturer
C. very large PAL
D. reprogrammable PAL
Show Answer
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Discuss
Correct Answer: reprogrammable PAL
5. ________ are used at the inputs of PAL/GAL devices in order to prevent input loading from a large number of AND gates.
Options
A. Simplified AND gates
B. Fuses
C. Buffers
D. Latches
Show Answer
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Discuss
Correct Answer: Buffers
6. SPLDs, CPLDs, and FPGAs are all which type of device?
Options
A. PAL
B. PLD
C. EPROM
D. SRAM
Show Answer
Scratch Pad
Discuss
Correct Answer: PLD
7. What is PROM?
Options
A. SPLD
B. QPLD
C. HPLD
D. PLD
Show Answer
Scratch Pad
Discuss
Correct Answer: PLD
8. What is the major downfall of microprocessor/DSP systems?
Options
A. Speed?they are too fast
B. Speed?they are too slow
C. Too much flexibility
D. Not enough flexibility
Show Answer
Scratch Pad
Discuss
Correct Answer: Speed?they are too slow
9. What is the input/output pin configuration of the GAL22V10?
Options
A. 10 output pins and 12 input pins
B. 2 special-purpose pins
C. 8 pins that are either inputs or outputs
D. All of the above
Show Answer
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Discuss
Correct Answer: 10 output pins and 12 input pins
10. FPGA is the acronym for ________.
Options
A. Flexible Programming [of] Generic Assemblies
B. Field Programmable Generic Array
C. Field Programmable Gate Array
D. Field Programmer's Gate Assembly
Show Answer
Scratch Pad
Discuss
Correct Answer: Field Programmable Gate Array
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