Pentium hardware width — what is the data bus size? Identify the width of the external data bus used by the classic Intel Pentium (P5-generation).

Introduction / Context:
The data bus width dictates how many bits can be transferred per bus cycle and strongly influences peak memory bandwidth. The classic Pentium (P5) widened the external data path beyond earlier 80386/80486 designs to improve performance.

Given Data / Assumptions:

• Intel Pentium P5 architecture era.
• Focus on external data bus width, not internal datapath microarchitecture.
• Conventional desktop configurations of the time.

Concept / Approach:

Earlier x86 processors evolved from 16-bit (8086) to 32-bit (80386/80486) internal architectures; however, the external data bus on Pentium was 64 bits wide, enabling double-word fetches per cycle, improving cache line fills and instruction/data bandwidth.

Step-by-Step Solution:

Verification / Alternative check:

Chipset and memory documentation from the era cite 64-bit memory interfaces to the CPU for Pentium systems.

Why Other Options Are Wrong:

16-bit and 32-bit reflect older bus widths; 128-bit is typical of later wide interfaces or multi-channel memory systems, not classic P5.

Common Pitfalls:

Confusing internal register size (32-bit general-purpose registers) with external bus width; they are related but not identical.

Final Answer:

64 bits