Address space calculation — locations addressed by a 20-bit bus Given an address bus width of 20 bits in a microprocessor system, how many unique memory locations can be addressed?

Introduction / Context:
Address bus width directly determines the size of the addressable memory space in byte-addressable architectures. Computing the total number of locations is a foundational skill in digital systems and computer architecture courses.

Given Data / Assumptions:

• Address bus has 20 lines (bits).
• Each unique combination selects one memory location (typically one byte).
• We assume simple linear addressing without bank switching.

Concept / Approach:
With N address lines, the number of distinct addresses equals 2^N. For N = 20, the total is 2^20. This is a power-of-two calculation commonly encountered when sizing ROM/RAM devices and when interpreting legacy architectures such as the 8086 with a 20-bit physical address bus (1 MB space).

Step-by-Step Solution:

Verification / Alternative check:
Cross-check by noting that 2^20 bytes equals 1 MB (using the binary definition: 1 MB = 1,048,576 bytes), which aligns with many classic systems.

Why Other Options Are Wrong:

• 2,097,152 (2^21), 4,194,304 (2^22), 8,388,608 (2^23) are for larger buses.
• 524,288 corresponds to 2^19, which is too small.

Common Pitfalls:

• Confusing decimal megabytes (1,000,000) with binary megabytes (1,048,576).

Final Answer:
1,048,576 locations