Memory read cycle — what does the CPU fetch? During a general read operation on the system bus, identify what the CPU obtains from the addressed location.

Introduction / Context:
A CPU interacts with memory through standardized bus cycles. Understanding the semantics of a read cycle clarifies how instructions and data are retrieved, and how the memory system responds to control signals like RD and M/IO on classic buses.

Given Data / Assumptions:

• A read cycle presents an address on the address bus and asserts a read control signal.
• The memory or I/O device places the contents of that address on the data bus.
• Instructions are stored as bytes or words in memory; they are fetched as data.

Concept / Approach:

At the bus level, everything fetched from memory is data. Whether the CPU interprets the fetched bytes as an instruction opcode or as operand data happens after the fetch. Therefore, the fundamental result of a read cycle is that the CPU obtains the data stored at the addressed location.

Step-by-Step Solution:

Verification / Alternative check:

Bus timing diagrams in architecture manuals show that the nature of the content (instruction or data) does not change the electrical read transaction.

Why Other Options Are Wrong:

“A program instruction” is a subtype of data, but the option “all of the above” incorrectly includes “another address” as a distinct bus-level object; reading an address merely means reading the data that happens to encode an address.

Common Pitfalls:

Confusing logical meaning with physical bus action. The bus always transports data values; semantics are applied later by the CPU.

Final Answer:

data itself