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Digital Electronics
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Digital System Projects Using HDL
Comments
Question
Why should a real hardware functional test be performed on the HDL stepper motor design?
Options
A. To check the speed of the software
B. To check the current levels in the motor
C. To check the voltage levels of the real outputs
D. To provide a fully operational system
Correct Answer
To check the speed of the software
Digital System Projects Using HDL problems
Search Results
1. What does the major block of an HDL code emulation of a keypad include?
Options
A. A sequencer
B. A clock
C. A multiplexer
D. A ring counter
Show Answer
Scratch Pad
Discuss
Correct Answer: A ring counter
2. How is the output frequency related to the sampling interval of a frequency counter?
Options
A. Directly with the sampling interval
B. Inversely with the sampling interval
C. More precision with longer sampling interval
D. Less precision with longer sampling interval
Show Answer
Scratch Pad
Discuss
Correct Answer: More precision with longer sampling interval
3. In the keypad application, when all columns are HIGH, the ring counter is enabled and counting, and
dav
is LOW, what is the status of the
d
outputs?
Options
A. On
B. Off
C. Hi-Z
D. 1011
Show Answer
Scratch Pad
Discuss
Correct Answer: Hi-Z
4. When designing an HDL digital system, which is the worst mistake one can make?
Options
A. Concluding that a fundamental block works perfectly
B. Failing to provide proper documentation
C. Adding blocks of code prior to testing them
D. Overlooking a possible VARIABLE
Show Answer
Scratch Pad
Discuss
Correct Answer: Concluding that a fundamental block works perfectly
5. In the keypad application, what does the data signal define?
Options
A. The row and column encoded data
B. The ring encoded data
C. The freeze locator data
D. The ring counter data
Show Answer
Scratch Pad
Discuss
Correct Answer: The row and column encoded data
6. The accuracy of the frequency counter depends on the:
Options
A. system clock frequency.
B. number of displayed digits.
C. sampling rate.
D. display update rate.
Show Answer
Scratch Pad
Discuss
Correct Answer: system clock frequency.
7. Which is not a major block of an HDL frequency counter?
Options
A. Display register
B. Decoder/display
C. Timing and control unit
D. Bit shifter
Show Answer
Scratch Pad
Discuss
Correct Answer: Bit shifter
8. In the digital clock project, the purpose of the frequency prescaler is to:
Options
A. find the basic frequency.
B. transform a 60 pps input to a 1 pps timing signal.
C. prevent the clock from exceeding 12:59:59.
D. allow the BCD display to have a value from 00?59.
Show Answer
Scratch Pad
Discuss
Correct Answer: transform a 60 pps input to a 1 pps timing signal.
9. In the frequency counter, what is the function of the Schmitt trigger circuit?
Options
A. To reduce input noise
B. To condition the input signal
C. To convert non-square waveforms
D. To provide a usable signal to the display unit
Show Answer
Scratch Pad
Discuss
Correct Answer: To convert non-square waveforms
10. In a digital clock application, the basic frequency must be divided down to:
Options
A. 1 Hz.
B. 60 Hz.
C. 100 Hz.
D. 1000 Hz.
Show Answer
Scratch Pad
Discuss
Correct Answer: 1 Hz.
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