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- Question
When is it important to use a three-state buffer?
Options- A. when two or more outputs are connected to the same input
- B. when all outputs are normally HIGH
- C. when all outputs are normally LOW
- D. when two or more outputs are connected to two or more inputs
- Correct Answer
- when two or more outputs are connected to the same input
- 1. What are the three output conditions of a three-state buffer?
Options- A. HIGH, LOW, float
- B. 1, 0, float
- C. both of the above
- D. neither of the above Discuss
- 2. How would a latch circuit be used in a microprocessor system?
Options- A. as transportation for Intel employees
- B. for a group of data that is the same
- C. as a set of common connections for transfer of data Discuss
- 3. What is the difference between a shift-right register and a shift-left register?
Options- A. There is no difference.
- B. the direction of the shift Discuss
- 4. If a 10-bit ring counter has an initial state 1101000000, what is the state after the second clock pulse?
Options- A. 1101000000
- B. 0011010000
- C. 1100000000
- D. 0000000000 Discuss
- 5. The bit sequence 0010 is serially entered (right-most bit first) into a 4-bit parallel out shift register that is initially clear. What are the Q outputs after two clock pulses?
Options- A. 0000
- B. 0010
- C. 1000
- D. 1111 Discuss
- 6. When the output of a tristate shift register is disabled, the output level is placed in a:
Options- A. float state
- B. LOW state
- C. high-impedance state
- D. float or high-impedance state Discuss
- 7. To operate correctly, starting a ring shift counter requires:
Options- A. clearing all the flip-flops
- B. presetting one flip-flop and clearing all others
- C. clearing one flip-flop and presetting all others
- D. presetting all the flip-flops Discuss
- 8. The group of bits 11001 is serially shifted (right-most bit first) into a 5-bit parallel output shift register with an initial state 01110. After three clock pulses, the register contains ________.
Options- A. 01110
- B. 00001
- C. 00101
- D. 00110 Discuss
- 9. The bit sequence 10011100 is serially entered (right-most bit first) into an 8-bit parallel out shift register that is initially clear. What are the Q outputs after four clock pulses?
Options- A. 10011100
- B. 11000000
- C. 00001100
- D. 11110000 Discuss
- 10. Assume that a 4-bit serial in/serial out shift register is initially clear. We wish to store the nibble 1100. What will be the 4-bit pattern after the second clock pulse? (Right-most bit first.)
Options- A. 1100
- B. 0011
- C. 0000
- D. 1111 Discuss
Shift Registers problems
Search Results
Correct Answer: both of the above
Correct Answer: as a set of common connections for transfer of data
Correct Answer: the direction of the shift
Correct Answer: 0011010000
Correct Answer: 1000
Correct Answer: float or high-impedance state
Correct Answer: presetting one flip-flop and clearing all others
Correct Answer: 00101
Correct Answer: 11000000
Correct Answer: 0000
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