Storage capacity per stage in a shift register In a shift register, how much storage capacity does each stage (flip-flop) represent?
Digital Electronics
Shift Registers
Difficulty: Easy
Choose an option
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AOne bit
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BTwo bits
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CFour bits (one nibble)
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DEight bits (one byte)
Answer
Correct Answer: One bit
Explanation
Introduction / Context:Shift registers are arrays of flip-flops used for temporary storage and serial/parallel conversion. Each flip-flop is a 1-bit memory element, so capacity scales linearly with stage count.
Given Data / Assumptions:
- A stage equals one edge-triggered flip-flop.
- Binary storage is being considered (not multi-level memory).
Concept / Approach:
A standard flip-flop stores one of two states (0 or 1). Therefore, a k-stage shift register stores k bits. Larger units such as nibbles and bytes are formed by grouping 4 or 8 such stages, respectively.
Step-by-Step Solution:
Per stage capacity = 1 bit.Total capacity for N stages = N * 1 bit.Example: 8 stages → 8 bits (1 byte).Verification / Alternative check:
Datasheets label Q0..Q7 for an 8-stage register, explicitly indicating 8 single-bit outputs.
Why Other Options Are Wrong:
- Two bits / four bits / eight bits: these would require 2, 4, or 8 flip-flops per stage, which is not how a stage is defined.
Common Pitfalls:
- Confusing total register width with per-stage capacity.
Final Answer:
One bit