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MSI Logic Circuits Questions
All outputs of the 74138 octal decoder are disabled (HIGH) when the enable inputs are:
Output 3 of a 74138 octal decoder is selected when it is enabled by a data input of: A0 = 1 A1 = 1 A2 = 0
A four-line multiplexer must have as inputs four data inputs and two select inputs.
The 74139 dual four-line demultiplexer functions as a demultiplexer if data input is on the line.
The outputs of the 74138 octal decoder are enabled when the enable inputs are .
In order to select data input I1 of a 74151 eight-line multiplexer, the select inputs must be:
When data input I5 of a 74148 octal-to-binary encoder is active, the data output is: A0 = 1 A1 = 0 A2 = 0
Incandescent 7-segment displays are especially well suited for use in portable battery-operated devices.
When data input I4 of a 74148 octal-to-binary encoder is active, the data output is: A0 = 1 A1 = 1 A2 = 0
In HDL, the operation of the DEMUX is exactly described using a ________.
When an application, such as an encoder, calls for a unique response from a circuit corresponding to a combination of its input variables, the two methods that best serve this purpose are the ________ and the ________.
A typical AHDL comparator follows an algorithm described as ________.
For the inputs shown in the given figure, the outputs for P > Q, P = Q, and P < Q are ____, ____, and ____, respectively.
In most modern computers, the transfer of data takes place over a common set of connecting lines called a ________.
A(n) ________ is a combinational logic circuit that compares two input binary quantities and generates outputs to indicate which one has the greater magnitude.
In order to select data input I5 of a 74151 eight-line multiplexer, the select inputs must be ________.
A(n) ________ display controls the reflection of available light.
The circuit shown below is a(n) ________.
When data input I6 of a 74148 octal-to-binary encoder is active, the data output is ________.
An everyday illustration of a multiplexer is ________.
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