74LS151 / 74151 eight-to-one multiplexer (MSI logic): To select data input I5, what binary pattern must be applied to the select inputs (S2, S1, S0)? Assume the active-low enable (/G) is asserted (LOW) so the device is enabled.

Introduction / Context:
The 74151 (also known as 74LS151) is a classic eight-to-one (8:1) data selector/multiplexer in the medium–scale integration (MSI) family. Three address or select inputs choose exactly one of eight data inputs (I0–I7) to pass to the output, provided the active-low enable (/G) is asserted. This question checks whether you know how the binary select pattern maps to a specific input line, here I5.

Given Data / Assumptions:

• Device: 74151 eight-line multiplexer.
• Data inputs: I0–I7.
• Select inputs: S2 (MSB), S1, S0 (LSB).
• Enable pin /G is active low and is held LOW (device enabled).
• Standard binary weighting of selects: S2 S1 S0 form a 3-bit number 0–7.

Concept / Approach:
A multiplexer routes one of N inputs to the output using a binary address on its select lines. For an 8:1 MUX, there are 3 select lines because 2^3 = 8. The mapping is direct: when S2 S1 S0 represent the binary code k, the input Ik is selected (assuming the chip is enabled). Thus, to select I5, apply the binary code 5 = 101 to S2 S1 S0.

Step-by-Step Solution:

Verification / Alternative check:
Datasheet truth tables for the 74151 show that S2 S1 S0 = 101 selects I5. If /G were HIGH, the output would be disabled and this selection would not propagate, confirming the necessity of enabling.

Why Other Options Are Wrong:

Common Pitfalls:
Mixing up the bit order (treating S0 as the MSB), forgetting to assert /G LOW, or confusing the 74151 with encoders/decoders that use active-low input conventions.

Final Answer:
S2 S1 S0 = 1 0 1 (with /G = 0)