74148 (8-to-3 priority encoder): When data input I5 is the asserted (active) input on a 74148 priority encoder, the three data outputs (A2, A1, A0) are claimed to be A0 = 1, A1 = 0, A2 = 0. Decide if this statement is correct (assume standard active-low inputs and outputs).

Difficulty: Easy

Correct Answer: Incorrect

Explanation:


Introduction / Context:
The 74148 is an 8-to-3 priority encoder with active-low inputs (I0–I7) and active-low outputs (A2, A1, A0). It encodes the highest-priority asserted input (I7 highest) into a 3-bit code. Many learners stumble over the active-low convention and inadvertently report the non-inverted code.


Given Data / Assumptions:

  • Active-low inputs: a logic 0 on Ix means “active.”
  • Active-low outputs: the binary code appears inverted at A2, A1, A0.
  • Assume I5 is the only active input and higher-priority I6, I7 are inactive.


Concept / Approach:
If input 5 (binary 101) is the asserted line, the encoder outputs the binary index of the highest asserted input—but as active-low signals. That means the output pattern is the bitwise inversion of 101, which is 010. Therefore, A2 = 0, A1 = 1, A0 = 0. Any claim that A0 = 1, A1 = 0, A2 = 0 swaps and misinterprets the active-low result.


Step-by-Step Solution:

Desired index = 5 → binary = 1 0 1 (MSB..LSB).74148 outputs are active-low → invert each bit: 1→0, 0→1, 1→0.Result: A2 A1 A0 = 0 1 0.Thus, the stated pattern A0 = 1, A1 = 0, A2 = 0 is incorrect.


Verification / Alternative check:
Check the manufacturer’s truth table: With I5 low and I6, I7 high, the encoded outputs read 0 1 0 (active-low). Enable/GS behavior does not change the fundamental code pattern.


Why Other Options Are Wrong:

  • Correct: Would require A2 A1 A0 = 0 0 1 (miscode), which is not the 74148 behavior.
  • Only correct if active-high: The 74148 is defined with active-low interfaces; converting to active-high requires inversion.
  • Ambiguous: Even with enables handled, the code mapping remains as above.


Common Pitfalls:
Forgetting that both inputs and outputs are active-low; mixing up bit order; not accounting for priority (I7 highest).


Final Answer:
Incorrect

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