Difficulty: Easy
Correct Answer: mask ROM, SRAM
Explanation:
Introduction / Context:
Integrated memories implement one logical bit using a “cell.” Different memory families use different devices for the cell (for example, a transistor-capacitor in DRAM or multiple transistors in SRAM). Cell design directly affects density (bits per mm^2), cost, power, and speed. This question compares typical, mainstream implementations used in digital systems.
Given Data / Assumptions:
Concept / Approach:
Mask ROM encodes data as the presence or absence of a device or connection, achieving extremely compact cells. DRAM uses 1 transistor + 1 capacitor per bit, also very dense but larger than simple ROM geometry. Nonvolatile Flash/EEPROM cells require special structures (floating gates, tunneling oxides), so area is moderate. SRAM typically needs 6 or more transistors per bit for static storage, making it the least dense (largest cell area).
Step-by-Step Solution:
Verification / Alternative check:
Textbooks and vendor datasheets consistently report SRAM density far below DRAM/ROM due to multi-transistor cells, while mask ROM is historically the densest because it eliminates write circuitry entirely.
Why Other Options Are Wrong:
Common Pitfalls:
Final Answer:
mask ROM, SRAM
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