In dynamic RAM (DRAM) design, what are the basic refresh modes used to periodically restore the stored charge in the memory cells?

Difficulty: Easy

Correct Answer: Burst refresh and distributed refresh

Explanation:


Introduction / Context:
Dynamic RAM (DRAM) stores each bit as charge on a tiny capacitor that leaks over time. To prevent data loss, DRAM must be refreshed at regular intervals. This question checks your understanding of the fundamental refresh strategies commonly referenced in memory system design and data sheets.


Given Data / Assumptions:

  • Technology: DRAM (not SRAM).
  • Cells are leaky capacitors that require periodic refresh within a specified retention time.
  • We are considering the standard, widely taught refresh schemes.


Concept / Approach:
Two basic refresh schemes are widely cited: burst (sometimes called RAS-only or burst-of-rows refresh) and distributed refresh. Burst refresh refreshes many or all rows in a tight sequence during a maintenance window. Distributed refresh spreads refresh commands evenly over time so normal accesses are less impacted. While you may encounter additional vendor terms like hidden/self refresh, the foundational pair in many curricula is burst and distributed refresh.


Step-by-Step Solution:
Identify the goal: keep every row refreshed within the maximum refresh interval (e.g., 64 ms).Understand burst refresh: issue refresh commands back-to-back to cover many rows rapidly during idle periods.Understand distributed refresh: interleave refresh commands periodically so performance impact is smoothed over time.Conclude the basic modes: burst refresh and distributed refresh.


Verification / Alternative check:
Vendor timing diagrams show auto-refresh commands that can be scheduled in groups (burst) or interspersed among normal cycles (distributed). Both satisfy the row refresh count requirement within the retention window.


Why Other Options Are Wrong:
Burst refresh: incomplete by itself as the question asks for the basic mode(s), plural.Distributed refresh: also incomplete alone in this context.Open refresh: not a standard term for a DRAM mode.Hidden refresh only: hidden/self refresh exists, but it is not the canonical pair being asked.


Common Pitfalls:
Mixing SRAM concepts (which do not need refresh) with DRAM, and confusing vendor-specific names with textbook categories. Also, forgetting that any valid scheme must ensure every row is refreshed in time.


Final Answer:
Burst refresh and distributed refresh

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