S–R flip-flop fundamentals — input levels required to force a state change For an S–R (Set–Reset) latch or flip-flop with active-HIGH inputs, which logic level must be applied at the respective S or R input to SET or RESET the device?

Introduction / Context:
An S–R (Set–Reset) latch or flip-flop is among the most basic storage elements in digital electronics. Understanding which input level causes a state change is foundational for debugging larger sequential circuits and for interpreting truth tables of derived devices such as JK and D flip-flops.

Given Data / Assumptions:

• Active-HIGH S and R inputs (the most common convention).
• No asynchronous clears or presets beyond S and R.
• We are discussing the logical behavior, not analog implementation details.

Concept / Approach:
With active-HIGH inputs, driving S to a HIGH forces Q to 1 (SET), and driving R to a HIGH forces Q to 0 (RESET). When both inputs are LOW simultaneously, the latch holds its previous state. The combination S = 1 and R = 1 is generally invalid for level-sensitive SR latches (or mapped to toggle/hold in other families), but the basic rule remains: a HIGH on the respective input asserts that function.

Step-by-Step Solution:

Verification / Alternative check:
Consult any SR truth table: S R = 1 0 → Qnext = 1; S R = 0 1 → Qnext = 0; S R = 0 0 → hold. This matches bench behavior on NOR- or NAND-realizations under active-HIGH conventions (with bubbles indicating inversion if active-LOW).

Why Other Options Are Wrong:

• LOW: LOW corresponds to non-asserted inputs in active-HIGH logic.
• Installed with diodes / limiting resistors / tri-stated: these are implementation or bus-connection details, not the logical condition that causes setting or resetting.

Common Pitfalls:

• Mixing up active-HIGH and active-LOW conventions. Always check symbol bubbles and datasheets.

Final Answer:
HIGH