Curioustab

Home » Digital Electronics » Counters

A 4-bit ripple counter consists of flip-flops, which each have a propagation delay from clock to Q output of 15 ns. For the counter to recycle from 1111 to 0000, it takes a total of ________.

15 ns
30 ns
45 ns
60 ns

Correct Answer: 60 ns

← Previous Question Next Question→

More Questions from Counters

List which pins need to be connected together on a 7492 to make a MOD-12 counter.
How many flip-flops are required to construct a decade counter?
The circuit given below fails to produce data output. The individual flip-flops are checked with a logic probe and pulser, and each checks OK. What could be causing the problem?
The process of designing a synchronous counter that will count in a nonbinary manner is primarily based on:
In a VHDL retriggerable edge-triggered one-shot, which condition will not exist when a clock edge occurs?
To operate correctly, starting a ring counter requires:
What type of register is shown below?
Which of the following is a type of shift register counter?
What decimal value is required to produce an output at "X"?
Select the response that best describes the use of the Master Reset on typical 4-bit binary counters.

Discussion & Comments

No comments yet. Be the first to comment!

Join Discussion