Curioustab
Aptitude
General Knowledge
Verbal Reasoning
Computer Science
Interview
Aptitude
General Knowledge
Verbal Reasoning
Computer Science
Interview
Counters Questions
What is the difference between a 7490 and a 7492?
List the state of each output pin of a 7447 if RBI = 0, LT = 1, A0 = 1, A1 = 0, A2 = 0, and A3 = 1.
The hexadecimal equivalent of 15,536 is ________.
Referring to the given figure, at which point is the serial data transferred to the parallel output?
Three cascaded decade counters will divide the input frequency by ________.
The terminal count of a 3-bit binary counter in the DOWN mode is ________.
For a one-shot application, how can HDL code be used to make a circuit respond once to each positive transition on its trigger input?
One of the major drawbacks to the use of asynchronous counters is:
When two counters are cascaded, the overall MOD number is equal to the ________ of their individual MOD numbers.
A 4-bit ripple counter consists of flip-flops, which each have a propagation delay from clock to Q output of 15 ns. For the counter to recycle from 1111 to 0000, it takes a total of ________.
List which pins need to be connected together on a 7492 to make a MOD-12 counter.
How many flip-flops are required to construct a decade counter?
The circuit given below fails to produce data output. The individual flip-flops are checked with a logic probe and pulser, and each checks OK. What could be causing the problem?
The process of designing a synchronous counter that will count in a nonbinary manner is primarily based on:
In a VHDL retriggerable edge-triggered one-shot, which condition will not exist when a clock edge occurs?
To operate correctly, starting a ring counter requires:
What type of register is shown below?
Which of the following is a type of shift register counter?
What decimal value is required to produce an output at "X"?
Select the response that best describes the use of the Master Reset on typical 4-bit binary counters.
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