Difficulty: Easy
Correct Answer: frequency divider
Explanation:
Introduction / Context: A common clock design task is converting a faster reference (for example, 60 pps derived from mains) down to the human time base of 1 pps. This is achieved by counting input pulses and producing one output pulse for every sixty input pulses.
Given Data / Assumptions:
Concept / Approach: Reducing frequency by an integer factor is frequency division. The circuit can be realized as a counter that rolls over every N pulses and emits a tick. A MOD-60 counter is a specific implementation of the general “frequency divider.” “Prescaling” is also division, but the commonly accepted top-level descriptor here is “frequency divider.”
Step-by-Step Solution:
Let fin = 60 pps, choose N = 60.Count input edges up to 60, then generate one output pulse.Reset count and repeat, yielding fout = fin / 60 = 1 pps.This function is generically a frequency divider (often implemented as a MOD-60 counter).Verification / Alternative check:
Synthesis reports show a small counter and comparator chain implementing divide-by-60.Why Other Options Are Wrong:
a MOD-60 counter: Specific and largely correct implementation, but the broader block name is “frequency divider.”frequency prescaling: A synonym in many contexts, but “divider” is the clearest label for the whole block.a BCD counter: BCD counting encodes digits; it is not inherently a divide-by-60 timing block.Common Pitfalls:
Mixing “prescaler” terminology with “multiplier”; division cannot increase frequency.Confusing BCD digit counting with arbitrary modulus division.Final Answer:
frequency divider
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