Frequency counter architecture: The major functional blocks of a basic frequency counter are the counter, ________, decoder/display, and a timing/control unit. Which block properly fills the blank?

Introduction / Context:
A frequency counter typically counts input pulses during a precise window and then displays the result. To present a stable reading, the design transfers the completed count into a register that drives the display, while the counter resets and prepares for the next measurement cycle. Recognizing this “display register” block is key to understanding how stable readouts are produced without freezing the entire counting pipeline.

Given Data / Assumptions:

• Main blocks: input conditioning (optional), counter, display interface, timing/control.
• An intermediate register is used to latch the final count for display.
• Prescalers may exist, but they are not mandatory for all ranges.

Concept / Approach:
Separating the “live” counting logic from the displayed value avoids glitches and rolling digits. After the gate interval ends, the counter value is latched into the display register, the counter is cleared, and counting resumes for the next interval while the previous value remains visible to the user. This is standard in both HDL and discrete logic implementations.

Step-by-Step Solution:

Verification / Alternative check:
Timing diagrams show the latch signal coincident with the end of the gate window, producing a stable output on the display even as the internal counter resets.

Why Other Options Are Wrong:

• Signal prescaler: Useful for very high frequencies but not a universal major block.
• Control inputs: These are signals to the timing/control unit, not a separate major block.
• Signal generator: Not part of a measurement instrument’s core chain.
• Low-pass filter: Not inherent to frequency counting.

Common Pitfalls:
Driving the display directly from the live counter (leads to flicker); forgetting to reset after latching; mis-timing the latch so digits display transient values.

Final Answer:
Display register