System buses and directionality Among the standard processor buses, which one carries information in both directions and therefore is bidirectional under normal operation?

Introduction / Context:
Classic microprocessor architectures expose three fundamental buses: address, data, and control. Understanding which ones are unidirectional versus bidirectional is essential for board design and timing analysis.

Given Data / Assumptions:

• The CPU initiates memory or I/O cycles by placing an address on the address bus.
• Data can flow from CPU to memory/I/O (writes) and from memory/I/O to CPU (reads).
• Control signals indicate the type and phase of the transfer (for example, RD̄, WR̄).

Concept / Approach:
Address lines are driven by the CPU to select a location—there is no need for memory to drive an address back, so the address bus is unidirectional (CPU → memory/I/O). The data bus must support both read and write directions, so it is bidirectional and often implemented with tristate or turn-around cycles.

Step-by-Step Solution:

Verification / Alternative check:
Examine timing diagrams: during reads, memory drives the data bus; during writes, the CPU drives. This confirms bidirectionality.

Why Other Options Are Wrong:

• Address bus: Typically one-way from CPU.
• Both buses: Not correct because only the data bus is bidirectional in standard designs.
• None of the above: Incorrect; the data bus fits.

Common Pitfalls:
Some SoCs use shared multiplexed address/data buses in legacy designs, but the directional concept remains: data lines change direction; address does not.

Final Answer:
data bus