Understanding SISO shift registers: role relative to parallel buses “A serial-in/serial-out (SISO) shift register transfers data from one line of a parallel bus to another line, one bit at a time.” Determine whether this description is accurate.

Introduction / Context:
Shift registers are categorized by how data enters and leaves: SISO, SIPO, PISO, and PIPO. Accurate terminology matters when specifying interfaces between serial links and parallel buses. This question tests understanding of what SISO actually does.

Given Data / Assumptions:

• SISO = Serial-In/Serial-Out: one serial input, one serial output.
• Parallel buses carry multiple bits simultaneously across multiple lines.
• SISO lacks parallel load or parallel readback capability by definition.

Concept / Approach:
A SISO shift register simply shifts a serial bitstream through cascaded flip-flops; bits enter serially and emerge serially after a fixed number of clocks. It does not “transfer data from one line of a parallel bus to another line.” Devices that bridge between serial and parallel are SIPO (serial-in/parallel-out) or PISO (parallel-in/serial-out), not SISO.

Step-by-Step Solution:
Identify the I/O modes: SISO = serial-to-serial pipeline.Contrast with SIPO: serial input converted to multiple parallel outputs.Contrast with PISO: captured parallel data shifted out serially.Therefore, the statement describing SISO as moving between parallel “lines” is inaccurate.

Verification / Alternative check:
Look at timing diagrams of a SISO; only one data line in and one data line out are active per clock, with no parallel load/read ports.

Why Other Options Are Wrong:
“Correct” conflicts with the definition of SISO. References to “universal” shift registers or bidirectional pins do not change the fundamental SISO interface.

Common Pitfalls:
Mixing up SISO with SIPO/PISO; assuming all shift registers can interface to parallel buses without explicit parallel ports.

Final Answer:
Incorrect