Difficulty: Easy
Correct Answer: Correct
Explanation:
Introduction / Context: Sequential logic differs from combinational logic by incorporating memory of past inputs. Real designs typically interleave storage elements and combinational functions to create controllers, counters, and pipelines. This item checks recognition of the canonical structure.
Given Data / Assumptions:
Concept / Approach: The standard synchronous model is: next_state = f(current_state, inputs); outputs = g(current_state, inputs). Memory holds current_state; combinational logic implements functions f and g. Almost all practical sequential blocks, from simple counters to complex CPUs, follow this template.
Step-by-Step Solution:
Identify memory elements (flip-flops/registers) as state holders.Identify combinational logic as next-state/output computation.Recognize this pairing is ubiquitous in sequential systems.Therefore, the statement is correct.Verification / Alternative check:
Examine a simple FSM diagram: state register + combinational next-state/output logic.Why Other Options Are Wrong:
Incorrect: The presence of both sections is the essence of sequential logic.Only true for synchronous counters / True only in microprocessors: Too narrow; the structure is general.Common Pitfalls:
Assuming memory is optional in “sequential” systems; by definition, it is not.Overlooking small registers embedded inside larger IP blocks.Final Answer:
Correct
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