Why ROM outputs are tri-stated in bused systems Most ROM ICs provide tri-state data outputs primarily to:

Introduction / Context:When multiple memory devices share a common data bus, only the selected device may drive the lines. Tri-state outputs solve this by letting nonselected devices disconnect electrically (Hi-Z), preventing bus contention.

Given Data / Assumptions:

• One shared data bus services multiple ROMs.
• Chip-select logic enables only one ROM at a time.
• Tri-state outputs provide HIGH, LOW, or Hi-Z states.

Concept / Approach:Tri-state outputs allow safe bus sharing. With CS inactive, the ROM outputs are Hi-Z, so another device can drive the same bus lines without conflict. This is the architectural reason most ROMs have tri-state data pins.

Step-by-Step Solution:CS asserted → outputs enabled → ROM drives bus.CS deasserted → outputs disabled → Hi-Z, no interference.Therefore, tri-state enables multiple ROMs on one bus.

Verification / Alternative check:ROM datasheets show output enable and chip select timing, with Hi-Z leakage specifications when deselected.

Why Other Options Are Wrong:Tri-state is unrelated to “three input lines.”Bidirectional data typically applies to RAM, not ROM; ROM is read-only in-system.“Isolate registers during read” is too narrow; the core reason is multi-device bus sharing.Speed is not inherently increased by tri-state drivers.

Common Pitfalls:Confusing tri-state with open-drain; both allow sharing but behave differently and require different bus biasing.

Final Answer:permit the connection of many ROM chips to a common data bus.