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Digital Arithmetic Operations and Circuits problems


  • 1. If B[7..0] = 10100101, what is the value of B[6..2]?

  • Options
  • A. 10100
  • B. 01001
  • C. 10010
  • D. 00101
  • Discuss
  • 2. The BCD addition of 910 and 710 will give initial code groups of 1001 + 0111. Addition of these groups generates a carry to the next higher position. The correct solution to this problem would be to:

  • Options
  • A. ignore the lowest order code group because 0000 is a valid code group and prefix the carry with three zeros
  • B. add 0110 to both code groups to validate the carry from the lowest order code group
  • C. disregard the carry and add 0110 to the lowest order code group
  • D. add 0110 to the lowest order code group because a carry was generated and then prefix the carry with three zeros
  • Discuss
  • 3. If [A] = 1011 1010, [B] = 0011 0110, and [C] = [A] ? [B], what is [C 4..2] in decimal?

  • Options
  • A. 1
  • B. 2
  • C. 3
  • D. 4
  • Discuss
  • 4. The range of positive numbers when using an eight-bit two's-complement system is:

  • Options
  • A. 0 to 64
  • B. 0 to 100
  • C. 0 to 127
  • D. 0 to 256
  • Discuss
  • 5. Determine the two's-complement of each binary number.
    00110        00011        11101

  • Options
  • A. 11001    11100    00010
  • B. 00111    00010    00010
  • C. 00110    00011    11101
  • D. 11010    11101    00011
  • Discuss
  • 6. The carry propagation delay in 4-bit full-adder circuits:

  • Options
  • A. is cumulative for each stage and limits the speed at which arithmetic operations are performed
  • B. is normally not a consideration because the delays are usually in the nanosecond range
  • C. decreases in direct ratio to the total number of full-adder stages
  • D. increases in direct ratio to the total number of full-adder stages, but is not a factor in limiting the speed of arithmetic operations
  • Discuss
  • 7. Which of the following is correct for full adders?

  • Options
  • A. Full adders have the capability of directly adding decimal numbers.
  • B. Full adders are used to make half adders.
  • C. Full adders are limited to two inputs since there are only two binary digits.
  • D. In a parallel full adder, the first stage may be a half adder.
  • Discuss
  • 8. Convert each of the decimal numbers to 8-bit two's-complement form and then perform subtraction by taking the two's-complement and adding.

    Digital Electronics Digital Arithmetic Operations and Circuits: Convert each of the decimal numbers to 8-bit two's-complement form and then perform subtraction by t


  • Options
  • A. 0001  0011
  • B. 0000  1110
  • C. 0010  1110
  • D. 1110  0000
  • Discuss
  • 9. Add the following hex numbers: 011016 + 1001016

  • Options
  • A. 1012016
  • B. 1002016
  • C. 1112016
  • D. 0012016
  • Discuss
  • 10. The binary subtraction 0 ? 0 =

  • Options
  • A. difference = 0
    borrow = 0
  • B. difference = 1
    borrow = 0
  • C. difference = 1
    borrow = 1
  • D. difference = 0
    borrow = 1
  • Discuss

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