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Digital Arithmetic Operations and Circuits problems


  • 1. In VHDL, what is a GENERATE statement?

  • Options
  • A. The start statement of a program
  • B. Not used in VHDL or ADHL
  • C. A way to get the computer to generate a program from a circuit diagram
  • D. A way to tell the compiler to replicate several components
  • Discuss
  • 2. Divide the following binary numbers.
    Digital Electronics Digital Arithmetic Operations and Circuits: Divide the following binary numbers.

  • Options
  • A. 0000  0010    0000  0010    1000  1111
  • B. 0000  0010    0001  0010    0000  0100
  • C. 0000  0011    0000  0010    0000  0100
  • D. 0000  0010    0000  0010    0000  0100
  • Discuss
  • 3. An 8-bit register may provide storage for two's-complement codes within which decimal range?

  • Options
  • A. +128 to ?128
  • B. ?128 to +127
  • C. +128 to ?127
  • D. +127 to ?127
  • Discuss
  • 4. When multiplying 13 × 11 in binary, what is the third partial product?

  • Options
  • A. 1011
  • B. 00000000
  • C. 100000
  • D. 100001
  • Discuss
  • 5. Add the following BCD numbers.

    0110   0111   1001
    0101   1000   1000

  • Options
  • A. 0000  1011    0000  1111    0001  0001
  • B. 0001  0001    0001  0101    0001  0001
  • C. 0000  1011    0000  1111    0001  0111
  • D. 0001  0001    0001  0101    0001  0111
  • Discuss
  • 6. Could the sum output of a full-adder be used as a two-bit parity generator?

  • Options
  • A. Yes
  • B. No
  • Discuss
  • 7. Perform the following hex subtraction: ACE16 ? 99916 =

  • Options
  • A. 23516
  • B. 13516
  • C. 03516
  • D. 33516
  • Discuss
  • 8. Add the following binary numbers.

    0010 0110   0011 1011   0011 1100
    +0101 0101   +0001 1110   +0001 1111

  • Options
  • A. 0111 1011    0100  0001    0101  1011
  • B. 0111 1011    0101  1001    0101  1011
  • C. 0111 0111    0101  1001    0101  1011
  • D. 0111 0111    0100  0001    0101  1011
  • Discuss
  • 9. Subtract the following hexadecimal numbers.

    47   34   FA
    ?25   ?1C   ?2F

  • Options
  • A. 22    18    CB
  • B. 22    17    CB
  • C. 22    19    CB
  • D. 22    18    CC
  • Discuss
  • 10. For a 4-bit parallel adder, if the carry-in is connected to a logical HIGH, the result is:

  • Options
  • A. the same as if the carry-in is tied LOW since the least significant carry-in is ignored.
  • B. that carry-out will always be HIGH.
  • C. a one will be added to the final result.
  • D. the carry-out is ignored.
  • Discuss

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