Difficulty: Easy
Correct Answer: wire
Explanation:
Introduction / Context:
Before performing a formal cost or timing analysis of a digital design, engineers often use quick heuristics to estimate implementation complexity. One such heuristic is to count how many individual input leads (wires) are feeding logic gates. This gives a fast sense of fan-in, interconnect density, and potential decoding complexity, which correlate with area, power, and sometimes delay.
Given Data / Assumptions:
Concept / Approach:
Fan-in (the number of distinct input wires per gate) and the total count of input leads in a network directly affect logic effort and wiring complexity. More input wires generally imply more decoding stages or larger gates, which can mean higher input capacitance and potential increases in propagation delay or power.
Step-by-Step Solution:
Identify what is being counted: input leads that end on gate input pins.Relate this to complexity: more wires → more interconnect and often more logic.Conclude that the blank should be filled with “wire.”
Verification / Alternative check:
In schematic reviews, designers frequently tally input wires to estimate mux widths, decoder sizes, or PLA/PAL input load, which supports this heuristic.
Why Other Options Are Wrong:
“Bus” is a bundle, not an individual lead. “Gate” counts instances, not input leads. “All of the above” is incorrect because the rule focuses on input wires entering gates.
Common Pitfalls:
Confusing the number of signals on a bus with individual wires; a 16-bit bus equals 16 wires entering logic, not one.
Final Answer:
wire.
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