Building a MOD-60 BCD counter for a digital clock In the clock project, a MOD-60 BCD counter can be implemented by cascading a MOD-10 (ones) counter into a MOD-6 (tens) BCD counter.

Introduction / Context:
Human-readable timekeeping typically uses BCD for seconds and minutes. To count from 00 to 59, we combine a ones digit that cycles 0…9 (MOD-10) with a tens digit that cycles 0…5 (MOD-6). Proper cascading ensures that when the ones digit rolls over from 9 to 0, the tens digit increments, together forming a MOD-60 count.

Given Data / Assumptions:

• Ones digit: BCD 0–9 (MOD-10).
• Tens digit: BCD 0–5 (MOD-6 constrained to valid BCD states).
• Carry/terminal count from ones drives the increment of tens.

Concept / Approach:
In synchronous designs, the ones counter provides a ripple-carry-out (RCO) or terminal count signal when it transitions from 9 to 0. This signal synchronously enables an increment in the tens counter. The tens counter resets from 5 to 0 when it receives the next carry, completing a 60-state sequence (00–59) before rolling over.

Step-by-Step Solution:

Verification / Alternative check:
Simulate for at least 70 cycles and observe sequence 00..59..00. Confirm illegal BCD states do not occur in tens digit.

Why Other Options Are Wrong:
“Incorrect” contradicts standard digital clock construction. “Valid only if tens is MOD-5” is wrong—the tens must count 0..5 (six states). “Requires Gray code” is unnecessary for BCD display counting.

Common Pitfalls:
Forgetting to constrain tens to 0..5; not gating the enable correctly; asynchronous ripple causing glitches instead of clean synchronous carry.

Final Answer:
Correct