Difficulty: Easy
Correct Answer: invalid condition
Explanation:
Introduction / Context: The S-R latch is widely taught because it illustrates fundamental bistable feedback. However, one of its input combinations leads to an undefined or forbidden state, and this drawback motivates the use of J-K and D-type primitives in many designs.
Given Data / Assumptions:
Concept / Approach: For a NOR-based S-R latch, S=1 and R=1 is invalid since both outputs are forced LOW before returning to indeterminate complements. For a NAND-based latch, S̅=0 and R̅=0 is the forbidden case. This invalid/undefined condition complicates input conditioning and can cause racing or metastability if not carefully avoided.
Step-by-Step Solution:
List behaviors: set, reset, hold, and forbidden.Identify the problematic combination depending on gate type.Conclude that the “invalid condition” is the main drawback.Verification / Alternative check:
Compare with J-K: the same corner is defined as toggle, eliminating the invalid state.Why Other Options Are Wrong:
complexity: S-R is actually simpler than J-K or D.slow speed: Speed depends on technology; not the defining drawback.latch mode: Being a latch is not inherently a drawback; it is a feature (level sensitivity).Common Pitfalls:
Mixing NOR and NAND conventions and forgetting which combination is forbidden.Assuming invalid state is harmless; it can produce unpredictable results.Final Answer:
invalid condition
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