Flip-flop asynchronous controls — standard labels and polarity The asynchronous inputs on common flip-flops are normally labeled ________ and ________, and they are normally active-________ inputs.

Introduction / Context:
Many flip-flops include asynchronous controls that can immediately force the stored state independent of the clock. Recognizing their standard labels and active polarity is crucial for reset strategy and power-up behavior in digital systems.

Given Data / Assumptions:

• Common families (TTL/CMOS) provide direct PRESET (set) and CLEAR (reset) pins.
• Datasheets frequently denote these inputs with overbars or bubbles indicating active-low behavior.
• Asynchronous controls override synchronous data inputs when asserted.

Concept / Approach:
“PRE” (preset) forces Q = 1, “CLR” (clear) forces Q = 0. The normal convention is active-low: PRĒ and CLR̄. Bubbles on the symbol pins or the bar notation communicate that a logic 0 asserts the function.

Step-by-Step Solution:
Identify the usual labels: PRE and CLR.Recognize active-low polarity from symbols or pin names.Conclude: PRE, CLR, LOW is the correct completion.

Verification / Alternative check:
Check any standard 74xx or 4000-series flip-flop datasheet (e.g., 74HC74 D-FF): asynchronous clear is active low; parts with preset also use active-low notation.

Why Other Options Are Wrong:
“ON/OFF/HIGH” and “START/STOP/LOW” are not standard labels. “SET/RESET/HIGH” describes synchronous naming and the wrong polarity for typical asynchronous control pins.

Common Pitfalls:
Failing to synchronize the deassertion of asynchronous resets; ignoring minimum pulse width; assuming polarity without checking the symbol.

Final Answer:
PRE, CLR, LOW