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Aptitude
General Knowledge
Verbal Reasoning
Computer Science
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Aptitude
General Knowledge
Verbal Reasoning
Computer Science
Interview
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Flip-Flops and Timers
What is one disadvantage of an S-R flip-flop?
It has no Enable input.
It has a RACE condition.
It has no clock input.
It has only a single output.
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Correct Answer:
It has a RACE condition.
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