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Home Digital Electronics Memory and Storage Comments

  • Question
  • Which of the following is NOT a type of memory?


  • Options
  • A. RAM
  • B. ROM
  • C. FPROM
  • D. EEPROM

  • Correct Answer
  • FPROM 


  • Memory and Storage problems


    Search Results


    • 1. Why is a refresh cycle necessary for a dynamic RAM?

    • Options
    • A. to clear the flip-flops
    • B. to set the flip-flops
    • C. The refresh cycle discharges the capacitor cells.
    • D. The refresh cycle keeps the charge on the capacitor cells.
    • Discuss
    • 2. Which of the following is one of the basic characteristics of DRAMs?

    • Options
    • A. DRAMs must have a constantly changing input.
    • B. DRAMs must be periodically refreshed in order to be able to retain data.
    • C. DRAMs have a broader "dynamic" storage range than other types of memories.
    • D. DRAMs are simpler devices than other types of memories.
    • Discuss
    • 3. Which type of ROM has to be custom built by the factory?

    • Options
    • A. ROM
    • B. mask ROM
    • C. EPROM
    • D. EEPROM
    • Discuss
    • 4. An 8-bit address code can select ________.

    • Options
    • A. 8 locations in memory
    • B. 256 locations in memory
    • C. 65,536 locations in memory
    • D. 131,072 locations in memory
    • Discuss
    • 5. What is the difference between static RAM and dynamic RAM?

    • Options
    • A. Static RAM must be refreshed, dynamic RAM does not.
    • B. There is no difference.
    • C. Dynamic RAM must be refreshed, static RAM does not.
    • Discuss
    • 6. Which is/are the basic refresh mode(s) for dynamic RAM?

    • Options
    • A. Burst refresh
    • B. Distributed refresh
    • C. Open refresh
    • D. Burst refresh and distributed refresh
    • Discuss
    • 7. What is the computer main memory?

    • Options
    • A. Hard drive and RAM
    • B. CD-ROM and hard drive
    • C. RAM and ROM
    • D. CMOS and hard drive
    • Discuss
    • 8. Address decoding for dynamic memory chip control may also be used for:

    • Options
    • A. controlling refresh circuits
    • B. read and write control
    • C. chip selection and address location
    • D. memory mapping
    • Discuss
    • 9. FIFO is formed by an arrangement of ________.

    • Options
    • A. diodes
    • B. transistors
    • C. MOS cells
    • D. shift registers
    • Discuss
    • 10. The time from the beginning of a read cycle to the end of tACS or tAA is referred to as:

    • Options
    • A. access time
    • B. data hold
    • C. read cycle time
    • D. write enable time
    • Discuss


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