Assume that a 4-bit serial in/serial out shift register is initially clear. We wish to store the nibble 1100. What will be the 4-bit pattern after the second clock pulse? (Right-most bit first.)
Options
A. 1100
B. 0011
C. 0000
D. 1111
Correct Answer
0000
More questions
1. CPLDs and FPGAs are often referred to as high-capacity programmable logic devices (HCPLDs).