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Home Digital Electronics Shift Registers Comments

  • Question
  • What are the three output conditions of a three-state buffer?


  • Options
  • A. HIGH, LOW, float
  • B. 1, 0, float
  • C. both of the above
  • D. neither of the above

  • Correct Answer
  • both of the above 


  • Shift Registers problems


    Search Results


    • 1. How would a latch circuit be used in a microprocessor system?

    • Options
    • A. as transportation for Intel employees
    • B. for a group of data that is the same
    • C. as a set of common connections for transfer of data
    • Discuss
    • 2. What is the difference between a shift-right register and a shift-left register?

    • Options
    • A. There is no difference.
    • B. the direction of the shift
    • Discuss
    • 3. If a 10-bit ring counter has an initial state 1101000000, what is the state after the second clock pulse?

    • Options
    • A. 1101000000
    • B. 0011010000
    • C. 1100000000
    • D. 0000000000
    • Discuss
    • 4. The bit sequence 0010 is serially entered (right-most bit first) into a 4-bit parallel out shift register that is initially clear. What are the Q outputs after two clock pulses?

    • Options
    • A. 0000
    • B. 0010
    • C. 1000
    • D. 1111
    • Discuss
    • 5. A bidirectional 4-bit shift register is storing the nibble 1110. Its input is LOW. The nibble 0111 is waiting to be entered on the serial data-input line. After two clock pulses, the shift register is storing ________.

    • Options
    • A. 1110
    • B. 0111
    • C. 1000
    • D. 1001
    • Discuss
    • 6. When is it important to use a three-state buffer?

    • Options
    • A. when two or more outputs are connected to the same input
    • B. when all outputs are normally HIGH
    • C. when all outputs are normally LOW
    • D. when two or more outputs are connected to two or more inputs
    • Discuss
    • 7. When the output of a tristate shift register is disabled, the output level is placed in a:

    • Options
    • A. float state
    • B. LOW state
    • C. high-impedance state
    • D. float or high-impedance state
    • Discuss
    • 8. To operate correctly, starting a ring shift counter requires:

    • Options
    • A. clearing all the flip-flops
    • B. presetting one flip-flop and clearing all others
    • C. clearing one flip-flop and presetting all others
    • D. presetting all the flip-flops
    • Discuss
    • 9. The group of bits 11001 is serially shifted (right-most bit first) into a 5-bit parallel output shift register with an initial state 01110. After three clock pulses, the register contains ________.

    • Options
    • A. 01110
    • B. 00001
    • C. 00101
    • D. 00110
    • Discuss
    • 10. The bit sequence 10011100 is serially entered (right-most bit first) into an 8-bit parallel out shift register that is initially clear. What are the Q outputs after four clock pulses?

    • Options
    • A. 10011100
    • B. 11000000
    • C. 00001100
    • D. 11110000
    • Discuss


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