If a 10-bit ring counter has an initial state 1101000000, what is the state after the second clock pulse?
Options
A. 1101000000
B. 0011010000
C. 1100000000
D. 0000000000
Correct Answer
0011010000
Shift Registers problems
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1. The bit sequence 0010 is serially entered (right-most bit first) into a 4-bit parallel out shift register that is initially clear. What are the Q outputs after two clock pulses?
2. A bidirectional 4-bit shift register is storing the nibble 1110. Its input is LOW. The nibble 0111 is waiting to be entered on the serial data-input line. After two clock pulses, the shift register is storing ________.
4. A bidirectional 4-bit shift register is storing the nibble 1101. Its input is HIGH. The nibble 1011 is waiting to be entered on the serial data-input line. After three clock pulses, the shift register is storing ________.