Defining RAM — key property of access time Which statement best describes random-access memory (RAM) in terms of access time across locations?

Introduction / Context:
The defining characteristic of Random Access Memory (RAM) is that any location can be accessed in essentially constant time relative to any other location, subject to timing constraints. This feature distinguishes RAM from sequential-access devices like tape drives.

Given Data / Assumptions:

• RAM: SRAM or DRAM accessed by address decoding and internal arrays.
• Random access means location N and location M have similar access latency.
• Sequential media require traversal through intermediate positions.

Concept / Approach:
“Random access” refers to uniform-time addressing, not to volatility or write endurance. In RAM, decoding logic selects rows/columns quickly, enabling direct reads/writes at arbitrary addresses. Consequently, CPUs and DMA engines rely on RAM for rapid, nonsequential instruction and data access.

Step-by-Step Solution:
Define random access: time to access is independent of address sequence.Compare with sequential access: must pass through preceding data.Therefore, the best description is that access time is the same for each location.

Verification / Alternative check:
SRAM timing diagrams and DRAM controller schedules show consistent per-access timing envelopes regardless of address (ignoring caching/banking subtleties), validating the random-access property.

Why Other Options Are Wrong:

• Depends on location: describes mechanical or sequential media, not RAM.
• Write once, read many: describes PROM/OTP, not RAM.
• Mass memory/sequential access: not the RAM model.

Common Pitfalls:

• Confusing “random access” with “nonvolatile.” RAM is typically volatile.
• Assuming cache effects invalidate the definition; caches change effective latency, not the underlying property.

Final Answer:
Access time is the same for each memory location