Logic Families and Their Characteristics Questions

• What is the range of invalid TTL output voltage?
• What is the standard TTL noise margin?
• How many 74LSTTL logic gates can be driven from a 74TTL gate?
• What should be done with unused inputs to a TTL NAND gate?
• What is the difference between the 74HC00 series and the 74HCT00 series of CMOS logic?
• The word "interfacing" as applied to digital electronics usually means:
• The problem of different current requirements when CMOS logic circuits are driving TTL logic circuits can usually be overcome by the addition of:
• What is the major advantage of ECL logic?
• Interfacing (74HCMOS to 74ALSTTl or 74TTL to 74LSTTL) can be done with no danger.
• The AND is the simplest of the gates, requiring the least amount of circuitry to implement in TTL.
• Propagation delay in TTL is due to slow switching speeds.
• A pulse is not perfectly square; it takes time for the digital level to rise from 0 up to 1 and to fall from 1 down to 0.
• In TTL the noise margin is between 0.8 V and 0.4 V.
• PMOS and NMOS are commonly used for small memories and microprocessors.
• In ECL, the HIGH and LOW levels are determined by which transistor in a differential amplifier is conducting more.
• The basic part numbers of ICs are the same regardless of the manufacturer because digital logic ICs have been standardized.
• Schottky logic overcomes the saturation and stored charge problem by placing a Schottky diode across the base-to-collector junction.
• A typical fan-out for most TTL is 9.