Digital adders — identifying the two basic adder circuit types In digital electronics, what are the two fundamental adder circuits used to build arithmetic units?

Introduction / Context:
Binary addition is the core of ALUs. Designers combine simple adder primitives to create multi-bit adders with or without carry look-ahead. Recognizing the two building blocks is essential for understanding ripple-carry and advanced adder topologies.

Given Data / Assumptions:

• A “half-adder” produces Sum and Carry from two input bits.
• A “full-adder” adds two input bits plus a carry-in and generates Sum and Carry-out.
• Multi-bit adders cascade full-adders and, optionally, a single half-adder for the least significant stage if no carry-in is required.

Concept / Approach:

The half-adder implements Sum = A ⊕ B and Carry = A · B. The full-adder extends this with the carry-in: Sum = A ⊕ B ⊕ Cin, Cout = (A · B) + (Cin · (A ⊕ B)). These blocks can be chained to construct n-bit adders and further optimized with carry-lookahead or carry-skip logic.

Step-by-Step Solution:

Verification / Alternative check:

Standard logic design curricula and data books define only these two basic adder cells; all other multi-bit adder designs are composed from them with additional acceleration logic.

Why Other Options Are Wrong:

• Sum and carry: outputs, not circuit types.
• Asynchronous/synchronous: timing categories, not adders.
• One-/two’s-complement: number representations, not circuits.
• Parallel/serial adders: system-level architectures built from the basic cells.

Common Pitfalls:

• Confusing output names with circuit names.
• Assuming “serial adder” is a primitive rather than an architectural use.

Final Answer:

half-adder and full-adder