ALU control — meaning of selector inputs In a typical arithmetic/logic unit (ALU), what do the selector inputs determine during operation?

Introduction / Context:
An ALU performs many operations (add, subtract, AND, OR, XOR, shifts). Control lines, often called selector inputs, choose which operation is applied to the input operands. Understanding this is foundational for CPU datapaths and programmable logic blocks.

Given Data / Assumptions:

• An ALU has data inputs (operands), control/selector inputs, and status outputs (carry, zero, overflow).
• Clocking is handled elsewhere (e.g., in a register stage), not by the ALU function selector.

Concept / Approach:

The selector inputs are decoded inside the ALU to route operands through the appropriate combinational network (adder, boolean logic, shifter). Different codes map to different functions. Timing (clock) and device selection are external system concerns, not chosen by these lines.

Step-by-Step Solution:

Verification / Alternative check:

Consult any standard 74xx ALU (e.g., 74181) or FPGA soft-ALU: the select pins choose the operation while separate enables or registers handle timing and chip-select.

Why Other Options Are Wrong:

• IC selection and clock frequency are system-level signals, not ALU function selects.
• Data word selection is performed by multiplexers, not the ALU's function selector.
• Supply voltage is fixed by design, not chosen by control lines.

Common Pitfalls:

• Confusing ALU select codes with opcode decoding stages that also handle register addressing.

Final Answer:

arithmetic or logic function