Curioustab

Home » Digital Electronics » Digital Arithmetic Operations and Circuits

An 8-bit register may provide storage for two's-complement codes within which decimal range?

+128 to –128
–128 to +127
+128 to –127
+127 to –127

Correct Answer: –128 to +127

← Previous Question Next Question→

More Questions from Digital Arithmetic Operations and Circuits

When multiplying 13 × 11 in binary, what is the third partial product?
Add the following BCD numbers. 0110 0111 1001 0101 1000 1000
Could the sum output of a full-adder be used as a two-bit parity generator?
Perform the following hex subtraction: ACE16 – 99916 =
Add the following binary numbers. 0010 0110 0011 1011 0011 1100 +0101 0101 +0001 1110 +0001 1111
Subtract the following hexadecimal numbers. 47 34 FA –25 –1C –2F
For a 4-bit parallel adder, if the carry-in is connected to a logical HIGH, the result is:
If B[7..0] = 10100101, what is the value of B[6..2]?
The BCD addition of 910 and 710 will give initial code groups of 1001 + 0111. Addition of these groups generates a carry to the next higher position. The correct solution to this problem would be to:
If [A] = 1011 1010, [B] = 0011 0110, and [C] = [A] • [B], what is [C 4..2] in decimal?

Discussion & Comments

No comments yet. Be the first to comment!

Join Discussion