Common-drain JFET stage naming: Is a JFET configured with its output taken from the source (common-drain) also known as a source follower?

Difficulty: Easy

Correct Answer: Correct

Explanation:


Introduction / Context:
Naming conventions in amplifier stages are consistent across FET types. In a common-drain configuration, the drain is AC-grounded (or held at a fixed potential), the input is applied at the gate, and the output is taken from the source. This topology is universally called a source follower because the output voltage closely follows the input, offset by a small source-gate bias-dependent amount.


Given Data / Assumptions:

  • Three JFET terminals: gate, drain, source.
  • Output sampled at the source node.
  • Biasing ensures linear region operation for small signals.
  • Load is connected to the source node (often via resistor).


Concept / Approach:
The source follower provides high input impedance, low output impedance, and near-unity voltage gain (slightly less than 1). The stage does not invert the signal; hence “follower.” These properties make it valuable as a buffer between high-impedance sources and heavier loads, minimizing signal loss and distortion.


Step-by-Step Solution:

Identify configuration: drain held relatively fixed; output at source.Analyze small-signal gain: Av ≈ gm * RS / (1 + gm * RS), typically just below 1.Check phase: non-inverting (0 degrees phase shift at low frequency).Conclude: common-drain JFET is the source follower.


Verification / Alternative check:
Compare with common-source (inverting gain) and common-gate (low input impedance, high bandwidth). Only the common-drain topology exhibits the follower behavior with high input and low output impedance.


Why Other Options Are Wrong:

Incorrect: conflicts with accepted nomenclature.Drain follower: not a standard term.Common-gate: a different topology with different impedance/gain properties.Only true for MOSFETs: the naming applies to both MOSFETs and JFETs.


Common Pitfalls:
Expecting voltage gain > 1 from a follower; ignoring source resistor biasing’s effect on linearity; overlooking the follower’s finite output swing limits due to VGS headroom.


Final Answer:
Correct

Discussion & Comments

No comments yet. Be the first to comment!
Join Discussion