Difficulty: Easy
Correct Answer: 8 address pins and 4 data pins
Explanation:
Introduction / Context:Memory device pin counts follow directly from the required address space and data width. This problem reinforces binary addressing calculations for ROM/EPROM devices.
Given Data / Assumptions:
Concept / Approach:Since 256 = 2^8, we need 8 address lines (A0…A7) to uniquely select a word. The data width is 4 bits, so we need 4 data pins (D0…D3) to read out a nibble from the selected location.
Step-by-Step Solution:
Compute address pins: log2(256) = 8 → 8 address pins.Data width: 4 bits → 4 data pins.Therefore, pin configuration is 8 address and 4 data pins (ignoring control pins like CE/OE/VPP).Verification / Alternative check:Cross-check with standard memory organizations: 1K × 8 uses 10 address pins; 256 × 4 is smaller, so 8 address pins is consistent.
Why Other Options Are Wrong:
Options with 4 address pins imply only 16 addresses (2^4), far less than 256.8 data pins would imply 8-bit width, not 4 bits.Common Pitfalls:
Confusing total bits (256×4=1024 bits) with address pin count; address pins depend only on the number of addresses.Final Answer:
8 address pins and 4 data pinsint range of −32768 to +32767)?
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