In basic computer architecture, the Instruction Cycle (IC) comprises the Fetch Cycle (FC) and the Execute Cycle (EC). Which relationship is correct?

Introduction / Context:
The instruction cycle models how a CPU processes one instruction. In a simple model, it consists of fetching the instruction from memory (FC) and then executing it (EC). Some architectures add decode and memory cycles, but the canonical decomposition for fundamentals is fetch plus execute.

Given Data / Assumptions:

• IC = instruction cycle for a single instruction.
• FC = fetch cycle (read the instruction from memory into the CPU).
• EC = execute cycle (decode/execute micro-operations to produce effects).

Concept / Approach:
By definition, the time or sequence for one instruction equals the time/sequence to fetch it plus the time/sequence to execute it. Therefore IC equals FC plus EC in this simplified model.

Step-by-Step Solution:

Verification / Alternative check:
Any architecture textbook diagram for the basic cycle shows a fetch phase (PC → MAR, memory read, IR ← MDR) followed by an execute phase (ALU/Control micro-ops), summing to the whole instruction cycle.

Why Other Options Are Wrong:

• IC = FC - EC: Nonsense dimensionally; a cycle is not a difference of sub-cycles.
• IC = FC + 2EC: Overcounts execute; not a standard definition.
• EC = IC + EC: Algebraically impossible unless IC = 0.

Common Pitfalls:

• Confusing pipeline stages (fetch, decode, execute, memory, write-back) with the conceptual two-phase model.
• Assuming decode is separate; many curricula subsume decoding into execute for this definition.

Final Answer:
IC = FC + EC