Difficulty: Easy
Correct Answer: Correct
Explanation:
Introduction / Context:
Binary addition is realized in hardware by half adders and full adders. The sum output bit reflects whether an odd number of inputs are 1. The XOR gate exactly captures this “odd parity” behavior, making it central to adder sum generation.
Given Data / Assumptions:
Concept / Approach:
For a half adder, Sum = A XOR B. For a full adder, Sum = A XOR B XOR Cin. In both cases, XOR chains implement the sum bit because XOR is 1 when an odd count of inputs are 1. Carries are produced with AND/OR combinations, but the sum computation is XOR-centric.
Step-by-Step Solution:
Verification / Alternative check:
Truth tables confirm odd-parity behavior: exactly one or three 1s among inputs produce Sum = 1. Implementation diagrams in textbooks show a cascading XOR for Sum.
Why Other Options Are Wrong:
XOR is used in both half and full adders; equality of inputs is not a requirement; carry look-ahead is an optimization for carry, not Sum logic.
Common Pitfalls:
Mixing up Sum and Carry roles; assuming AND/OR produce Sum. In reality, AND/OR form the carry network, while XOR forms Sum.
Final Answer:
Correct
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