In a microprocessor-based system, which bus primarily carries the control signals that direct peripherals and memory to perform specific operations (read, write, acknowledge, interrupt, etc.)?

Introduction / Context:
System buses partition the roles of communication between the CPU, memory, and peripherals. Differentiating the data, address, and control buses is a core concept in digital system design and troubleshooting.

Given Data / Assumptions:

• Address bus: selects which memory or I/O location is targeted.
• Data bus: carries the actual data values being read or written.
• Control bus: carries signals defining the operation and timing.

Concept / Approach:
To perform any transaction, the CPU places an address on the address bus, the operation type on the control bus (e.g., RD, WR), and transfers data on the data bus. Additional control lines can include clock, reset, interrupt requests, and acknowledge signals.

Step-by-Step Solution:

Verification / Alternative check:
Examine timing diagrams of a memory read cycle: signals like RD, WR, ALE, and IO/M are asserted on control lines to define the transaction.

Why Other Options Are Wrong:

• Data bus: carries payload, not directives.
• Address bus: carries location indices, not read/write control.
• Address decoder bus: not a standard bus name; decoding happens on address lines using logic.

Common Pitfalls:
Assuming any single bus controls everything; in reality, the three-bus model separates roles for clarity and performance.

Final Answer:
control bus