8051 reset and code fetch source — with EA held LOW at reset, where does the Program Counter fetch the first instruction from? Select the memory space the CPU uses immediately after reset when EA = 0.

Introduction / Context:
The EA (External Access) pin selects the code fetch source on classic 8051 devices. Correct interpretation of EA at reset is vital for systems using external ROM/Flash for program storage.

Given Data / Assumptions:

• EA line is LOW (EA = 0)
• CPU is coming out of reset
• Standard 8051 reset vector at address 0000H

Concept / Approach:
EA = 0 forces all code fetches to external code memory, ignoring internal program memory even if present. At reset, the Program Counter is 0000H, so the first opcode is read at external address 0000H via /PSEN and the external bus.

Step-by-Step Solution:

Verification / Alternative check:
With EA = 1, internal code memory (if implemented) is used up to its size; external fetch occurs when exceeding it. EA = 0 disables internal code fetch altogether, confirming the answer.

Why Other Options Are Wrong:

• Internal code memory: only when EA = 1.
• Internal/external data memory: data spaces are unrelated to instruction fetch.
• On-chip bootloader ROM: not present on classic 8051 parts.

Common Pitfalls:

• Assuming the presence of internal Flash overrides EA; it does not when EA = 0.

Final Answer:
external code memory